1. Field of the Invention
The present invention relates to a flip chip package, and in particular, to a flip chip package and a process of forming the same, for preventing fiducial marks of a circuit substrate being oxidized.
2. Description of the Related Art
Following the increase of input/output contacts of an integrated circuit, chip package technology has become more and more diversified. This is due to the fact that Flip Chip (FC) Interconnect technology minimizes the size of the chip package, and reduces signal transmission path, etc. Currently, flip chip interconnect technology is widely employed in the field of chip package, for instance, Chip Scale Package (CSP), Direct Chip Attached (DCA) package, and Multi-Chip Module (MCM) package, etc. Flip chip interconnect technology is employed in achieving the objective of chip package.
Flip chip interconnect technology employs the method of defining area array by disposing a plurality of solder pads onto the active surface of the chip and forming bumps on the solder pads, respectively. Next, the chip is then flipped to connect the plurality of bumps on the chip to a plurality of bump pads on the circuit substrate respectively so that the chip and the circuit substrate are electrically and mechanically connected via these bumps, and the chip can be further indirectly electrically connected to external electronic devices via the internal circuits of the circuit substrate. In addition, a plurality of fiducial marks is formed on the surface of the circuit substrate that faces the chip. The fiducial marks provide positioning reference between the chip and the circuit substrate so that the connection between the chip and the circuit substrate is accurate.
FIG. 1A is a top view of a conventional flip chip package, and FIG. 1B is a sectional view along line A–A′ of FIG. 1A. Chip 110 is connected by a flip chip interconnect method. By disposing a plurality of bumps 130 (only one being shown) on the carrier surface 122 of the circuit substrate 120, the circuit substrate 120 is provided with a plurality of bump pads 124 (only one being shown) and a plurality of fiducial marks 126. These bump pads 124 are generally disposed on the center of the carrier surface 122. The fiducial marks 126 are generally disposed at the four ,comers of the carrier surface 122. These bumps 130 are respectively connected between the solder pads 112 of the chip 110 and the bump pads 124 on the circuit substrate 120. Further, a solder mask 128 is disposed on the carrier surface 122 of the circuit substrate 120, and a plurality of openings 128a, 128b of the solder mask 128 expose the bump pads 124 and the fiducial marks 126, respectively. Due to the openings 128a, 128b exposing the bump pads 124 and the fiducial marks 126 to the external environment, and in order to prevent the bump pads 124 and the fiducial marks 126 from long contact with the air, a plurality of protective layers 152 is formed on the bump pads 124 and the fiducial marks 126 respectively.
Referring to FIG. 2, a sectional view of a conventional circuit substrate is shown. The openings 128a, 128b of the solder mask 128 expose the bump pads 124 and the fiducial marks 126 of the circuit substrate 120 respectively, and solder blocks 154 are formed on the bump pads 124 and the fiducial marks 126, respectively. Thus, similarly, by means of the solder blocks 154 on the fiducial marks 126, the isolation of the solder block 154 with the fiducial marks 126 and the external environment can be achieved. Other solder blocks 154 on the bump pads 124, after a reflow treatment, can connect the bumps (indicated as 130 in FIG. 1B) to the bump pad 124, respectively. However, the solder blocks 154 on the fiducial marks 126 have ball shaped surface and when image monitoring system is employed to position the chip (reference number 110 in FIG. 1B) and the circuit substrate 120, the image monitoring system, for instance a CCD camera, may be affected by one or more of the protruded solder blocks 154 on the fiducial marks 126 such that one or more positions of the fiducial marks 126 cannot be accurately detected by the image monitoring system. Thus, the position between the chip (reference 110 of FIG. 1B) and the circuit substrate 120 cannot be accurately made.
Referring to FIG. 3, a sectional view of another conventional circuit substrate is shown. In order to mitigate the shortcoming for being unable to accurately position the chip to the circuit substrate due to the protruded solder blocks 154, the surface of the fiducial marks 126 are respectively improved by covering a substantially flat organic surface protection layer (OSP layer) 156 to isolate the fiducial marks 126 from the external environment. However, the OSP layer 156 will disappear at the reflow treatment or other curing treatment. At this instance, these fiducial marks 126 will be again directly exposed to the external environment. Thus the fiducial marks 126 is subjected to oxidation with atmospheric oxygen and or moisture.
It should be noted that the fiducial marks are formed from the outer circuit layer of the circuit substrate. Thus, when the material of the circuit layer of the circuit substrate is copper, after the flip chip package fabrication process is completed, i.e., after the chip is mounted on the circuit substrate, the exposed fiducial marks of the circuit substrate will be oxidized to form green colored copper oxide. This will damage the aesthetic appearance of the package. Besides, moisture of the external environment will enter the interior of the circuit substrate via the oxidized region of the exposed fiducial marks. Thus, short circuits will occur in the interior of the circuit substrate, which cause a failure to the circuit substrate.